Task:

• As in the first release of the Gigabit Ethernet router the core functionality of the OLT was to be implemented into an FPGA. The most challenging part was to integrate six up- and downstream channels with 2.5 GBit/s each. This results in an overall bandwidth of 30 GBit/s on a single FPGA. Main parts of each channel were a complex Ethernet MAC/VLAN address translation and an IP anti-spoofing unit.

Platform:

• XILINX Virtex-5 LX85T™ FPGA

Task:

• For the private media consumer the so called "last mile" is building a bandwidth shortage in using audio-, video- and data-services. SIEMENS is workimg on closing this shortage by the GPON-technology on the basis of passive optical networks. GPON operates with a generic encapsulation (GEM). Ethernet frames and data can be transmitted in time division (TDM) via a connection of 2.5 Gbit/s.
  In this project SILICANN is implementing a Gigabit-Ethernet-Router for SIEMENS. In the same project SILICANN is working on the counterpart in the end user device in FPGA-technology.

Platform:

• XILINX Virtex-4™ FPGA

Client:

• Phoenix Contact GmbH & Co. KG

Task:

• Within this project an existent test platform for multiple INTERBUS-clients was to be redesigned based on up-to-date FPGA technology. Main focus was to keep the system compatible to existent software. Silicann was responsible for the FPGA implementation of a fully configurable INTERBUS-network matrix and the integration of various logic ICs into the FPGA. This includes two controller interfaces, one to an Intel 80C152 and another to a Motorola 68332, as well as an asynchronous dual-port RAM.

Platform:

• Altera Cyclone II EP2C8F256C8™ FPGA

Client:

• neoplas control GmbH

Task:

• To monitor plasma processes and molecular concentrations of gases the company neoplas control GmbH utilizes so called quantum cascade lasers (QCL). These lasers are triggered with very short high-energy impulses. The goal of this project was to realize the control of the laser and the detector unit. The most challenging part was to implement configurable pulse width generators with a resolution of 2 ns.

Platform:

• XILINX Spartan-3AN™ FPGA

Client:

• Subsidiary of a German automotive supplier

Task:

• To develop a robust, trainable algorithm for pattern recognition in the signal paths of an IR sensor, with the purpose of detecting different switching modes

Platform:

• Client's hardware system

Client:

• Bionas GmbH

Task:

• Bionas develops analyzing systems for in vitro profiling of the metabolic activity of cells to understand their cellular function. The analyzing system Bionas 1500 comprises a silicon sensor chip measuring various metabolic cell parameters, such as the solution pH, the oxygen content, and the cell impedance. Silicann Technologies has implemented the interface to AD/DA converters, the processing of the sensor data, the control of a pump and the temperature control. This software runs on a Texas Instruments digital signal controller. The communication to a PC is realized with the serial interface of the controller.

Platform:

• Texas Instruments DSC

Client:

• Silicann Technologies GmbH

Task:

• modular
• extensible
• small
• good at price
• freie IDE

• Expandable command set
• Application-specific modules and IPs can be integrated
• Flexible storage interface
• 128 kB user address space for ports and modules
• C compiler: GNU GCC 4.0

Platform:

• -